1. Technical Field
Embodiments of the present disclosure generally relate to a semiconductor device or semiconductor devices and refresh methods thereof.
2. Related Art
In the electronics industry, highly integrated fast volatile memory devices such as high performance dynamic random access memory (DRAM) devices widely used as memory devices are increasingly in demand with the development of high performance electronic systems. High performance electronic systems are, for example, personal computers or communication systems. In particular, when semiconductor devices such as the DRAM devices are employed in cellular phones or notebook computers, the semiconductor devices have to be designed to have an excellent low power consumption characteristic. Accordingly, a lot of effort has been focused on reduction of an operation current and a standby current of the semiconductor devices.
A data retention characteristic of a DRAM cell including a single transistor and a single storage capacitor may be very sensitive to a temperature. Thus, the DRAM devices may perform a refresh operation that senses data stored in the DRAM cells and rewrites the data into the DRAM cells in an appropriate period according to the data retention characteristics of the DRAM cells.
Semiconductor memory devices may be designed and fabricated to include a test mode function for evaluating their operations and redundancy memory cells for a repair operation. That is, various parameters of the semiconductor memory devices may be measured in a test mode at a wafer level or at a package level and the tested semiconductor memory devices may be sorted into good chips, repairable chips, or failed chips according to the test results. If the repairable chips are successfully repaired by the repair operation, the repairable chips may be classified into good chips. The repair operation may be performed to replace word lines connected to failed memory cells with redundancy word lines connected to the redundancy memory cells.